--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -3230,6 +3230,22 @@ void __init board_bcm963xx_init(void)
 		val &= MPI_CSBASE_BASE_MASK;
 	}
 	boot_addr = (u8 *)KSEG1ADDR(val);
+	pr_info("Boot address 0x%08x\n",(unsigned int)boot_addr);
+
+	/* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
+	/* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
+	/* Loading firmware from the CFE Prompt always loads to Bank 0 */
+	/* Do an early check of CFE and then select bank 0 */
+
+	if (boot_addr == (u8 *)0xbf800000) {
+		u8 *tmp_boot_addr = (u8*)0xbfc00000;
+
+		bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET);
+		if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) {
+			pr_info("V2500V: nvram bank 0\n");
+			boot_addr = tmp_boot_addr;
+		}
+	}
 
 	/* dump cfe version */
 	cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
--- a/arch/mips/bcm63xx/dev-flash.c
+++ b/arch/mips/bcm63xx/dev-flash.c
@@ -21,6 +21,7 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 
+#include <bcm63xx_board.h>
 #include <bcm63xx_cpu.h>
 #include <bcm63xx_dev_flash.h>
 #include <bcm63xx_regs.h>
@@ -256,6 +257,13 @@ int __init bcm63xx_flash_register(void)
 			val = bcm_mpi_readl(MPI_CSBASE_REG(0));
 			val &= MPI_CSBASE_BASE_MASK;
 
+			/* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
+			/* Loading from CFE always uses Bank 0 */
+			if (!strcmp(board_get_name(), "V2500V_BB")) {
+				pr_info("V2500V: Start in Bank 0\n");
+				val = val + 0x400000; // Select Bank 0 start address
+			}
+
 			mtd_resources[0].start = val;
 			mtd_resources[0].end = 0x1FFFFFFF;
 		}
